Teledyne-lecroy QPHY-DDR2 Manuel d'utilisateur

Naviguer en ligne ou télécharger Manuel d'utilisateur pour Logiciel Teledyne-lecroy QPHY-DDR2. Teledyne LeCroy QPHY-DDR2 User Manual Manuel d'utilisatio

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Page 1 - Operator’s Manual

QPHY-DDR2 DDR2 Serial Data Operator’s Manual Revision A – July, 2009 Relating to the Following Release Versions:  Software Option Rev. 5.9

Page 2 - 2 QPHY-DDR2-OM-E Rev A

10 QPHY-DDR2-OM-E Rev A Figure 5. Burst write followed by burst read [JESD79-2E figure 41] USING QUALIPHY DDR2 QualiPHY DDR2 guides the user, ste

Page 3 - Table of Contents

QPHY-DDR2 Software Option QPHY-DDR2-OM-E Rev A 11 QUALIPHY COMPLIANCE TEST PLATFORM QualiPHY is LeCroy’s compliance test framework which leads the

Page 4 - 4 QPHY-DDR2-OM-E Rev A

12 QPHY-DDR2-OM-E Rev A See the QualiPHY Operator’s Manual for more information on how to use the QualiPHY framework. Figure 7. The Test Report i

Page 5

QPHY-DDR2 Software Option QPHY-DDR2-OM-E Rev A 13 Oscilloscope Option Key Installation An option key must be purchased to enable the QPHY-DDR2 opti

Page 6 - TABLE OF FIGURES

14 QPHY-DDR2-OM-E Rev A QualiPHY tests the oscilloscope connection after clicking the Start button. The system prompts you if there is a connectio

Page 7 - BASIC FUNCTIONALITY

QPHY-DDR2 Software Option QPHY-DDR2-OM-E Rev A 15 4. Click the Configuration button in the QualiPHY main menu: 5. Select a configuration from th

Page 8 - 8 QPHY-DDR2-OM-E Rev A

16 QPHY-DDR2-OM-E Rev A Customizing QualiPHY The predefined configurations in the Configuration screen cannot be modified. However, you can crea

Page 9

QPHY-DDR2 Software Option QPHY-DDR2-OM-E Rev A 17 Once a custom configuration is defined, script variables and the test limits can be changed by us

Page 10 - USING QUALIPHY DDR2

18 QPHY-DDR2-OM-E Rev A QPHY-DDR2 Operation After pressing Start in the QualiPHY menu, the software instructs how to set up the test using pop-up

Page 11 - QPHY-DDR2 Software Option

QPHY-DDR2 Software Option QPHY-DDR2-OM-E Rev A 19 DDR2 MEASUREMENT PREPARATION Before starting any test or data acquisition, the oscilloscope must

Page 12 - 12 QPHY-DDR2-OM-E Rev A

2 QPHY-DDR2-OM-E Rev A LeCroy Corporation 700 Chestnut Ridge Road Chestnut Ridge, NY 10977–6499 Tel: (845) 578 6020, Fax: (845) 578 5985 Internet

Page 13

20 QPHY-DDR2-OM-E Rev A PCF200 Fixture Overview  Probe Connection to PCF200  Probe Calibration Menu  D620 Probe Calibration Advanced mode is

Page 14 - 14 QPHY-DDR2-OM-E Rev A

QPHY-DDR2 Software Option QPHY-DDR2-OM-E Rev A 21 PCF200 Fixture Overview Major components of the PCF200 fixture are shown in the following figure:

Page 15

22 QPHY-DDR2-OM-E Rev A Probes are connected electrically in a single-ended arrangement: the positive (+) side of the probe must be connected to t

Page 16 - 16 QPHY-DDR2-OM-E Rev A

QPHY-DDR2 Software Option QPHY-DDR2-OM-E Rev A 23 Figure 17. Basic Probes Calibration menu The information in the probe calibration menu is organi

Page 17

24 QPHY-DDR2-OM-E Rev A Skew This field shows the measured skew between the probe in the specified channel and the reference channel. This can be

Page 18 - 18 QPHY-DDR2-OM-E Rev A

QPHY-DDR2 Software Option QPHY-DDR2-OM-E Rev A 25 Checking this box allows:  Calibration of gain/offset only  Calibration of deskew only  Acc

Page 19

26 QPHY-DDR2-OM-E Rev A Differential (or Single-Ended) Probe Selection The PCF200 fixture calibrates probes differentially or in single-ended mode

Page 20 - 20 QPHY-DDR2-OM-E Rev A

QPHY-DDR2 Software Option QPHY-DDR2-OM-E Rev A 27 QPHY-DDR2 TEST CONFIGURATIONS Configurations include variable settings and limit sets as well, no

Page 21

28 QPHY-DDR2-OM-E Rev A  tDS(base)  tDH(base)  tWPRE  tWPST 3) CKdiff-DQse-DQSdiff 667 Read Burst (3 probes) This configuration runs all

Page 22 - 22 QPHY-DDR2-OM-E Rev A

QPHY-DDR2 Software Option QPHY-DDR2-OM-E Rev A 29  tDS1(base)  tDH1(base)  SlewR (on Add/Ctrl signal)  SlewF (on Add/Ctrl signal)  VIH(ac

Page 23

QPHY-DDR2 Software Option QPHY-DDR2-OM-E Rev A 3 Table of Contents INTRODUCTION TO QPHY-DDR2 ...

Page 24 - 24 QPHY-DDR2-OM-E Rev A

30 QPHY-DDR2-OM-E Rev A D2) Demo of Eye Diagram (Debug) This configuration uses the saved waveforms found in the D:\Waveforms\DDR2 folder and run

Page 25

QPHY-DDR2 Software Option QPHY-DDR2-OM-E Rev A 31 QPHY-DDR2 VARIABLES General Variables The following variables are used by all configurations. The

Page 26 - 26 QPHY-DDR2-OM-E Rev A

32 QPHY-DDR2-OM-E Rev A Silent mode control No more interaction with the user when silent mode is on. Choose between Yes or No. Default is No. Thi

Page 27

QPHY-DDR2 Software Option QPHY-DDR2-OM-E Rev A 33 Configuration Specific Variables The following variables are specific to the configuration in whi

Page 28 - 28 QPHY-DDR2-OM-E Rev A

34 QPHY-DDR2-OM-E Rev A QPHY-DDR2 LIMIT SETS DDR2-400 This corresponds to the JEDEC JESD79-2E DDR2 standard specification limits for 400 MT/s. DDR

Page 29

QPHY-DDR2 Software Option QPHY-DDR2-OM-E Rev A 35 tCH(avg), Average High Pulse Width tCH(avg) is defined as the average high pulse width, as calcul

Page 30 - 30 QPHY-DDR2-OM-E Rev A

36 QPHY-DDR2-OM-E Rev A tJIT(per), Clock Period Jitter Applicable only to 667 and 800 MHz device only. tJIT(per) is defined as the largest deviati

Page 31 - QPHY-DDR2 VARIABLES

QPHY-DDR2 Software Option QPHY-DDR2-OM-E Rev A 37 6 ≤ n ≤ 10 for tERR(6-10per) 11 ≤ n ≤ 50 for tERR(11-50per) Measured on both the rising and the f

Page 32 - 32 QPHY-DDR2-OM-E Rev A

38 QPHY-DDR2-OM-E Rev A or equal to the maximum limit. VIH(dc), minimum DC input logic high Measure the local minimum and maximum values from the

Page 33

QPHY-DDR2 Software Option QPHY-DDR2-OM-E Rev A 39 AC Undershoot, Maximum overshoot area above VDDQ Prerequisite: AC Undershoot maximum peak amplit

Page 34 - QPHY-DDR2 TESTS

4 QPHY-DDR2-OM-E Rev A D1) Demo of All Clock tests ...

Page 35

40 QPHY-DDR2-OM-E Rev A not reported in the Jedec JESD79-2E standard. Therefore it is not selected in the standard configurations, but only in the

Page 36 - 36 QPHY-DDR2-OM-E Rev A

QPHY-DDR2 Software Option QPHY-DDR2-OM-E Rev A 41 tHP, CK half pulse width Prerequisite: needs result of tCL and tCH Clock Tests. tHP refers to th

Page 37

42 QPHY-DDR2-OM-E Rev A Prerequisite: tERR(6-10per), a derating factor is applied to the limit depending on the clock jitter. This is applicable t

Page 38 - 38 QPHY-DDR2-OM-E Rev A

QPHY-DDR2 Software Option QPHY-DDR2-OM-E Rev A 43 Write Bursts tDQSS, DQS latching rising transitions to associated CK edge CK rising edge at VREF

Page 39

44 QPHY-DDR2-OM-E Rev A tWPRE, Write Preamble Time from when DQS begins to be driven (at the beginning of the preamble) to when it crosses Vref.

Page 40 - 40 QPHY-DDR2-OM-E Rev A

QPHY-DDR2 Software Option QPHY-DDR2-OM-E Rev A 45 JESD79-2E Specific Note 8 (page 85 to 94) with tables 43 and 44 explain the limit compensation ve

Page 41

46 QPHY-DDR2-OM-E Rev A signal must be monotonic between VIL(dc)max and VIH(dc)min. See Figure 30 as follows. Jedec JESD79-2E Specific Note 8 (pag

Page 42 - 42 QPHY-DDR2-OM-E Rev A

QPHY-DDR2 Software Option QPHY-DDR2-OM-E Rev A 47 tIH(base) - Address and Control Input Hold Time Input waveform timing is referenced from the inp

Page 43

QPHY-DDR2 Software Option QPHY-DDR2-OM-E Rev A 5 tCL(abs), Absolute Low Pulse Width ...

Page 44 - 44 QPHY-DDR2-OM-E Rev A

6 QPHY-DDR2-OM-E Rev A TABLE OF FIGURES Figure 1. Data output (read) timing [JESD79-2E figure 32] ...

Page 45

QPHY-DDR2 Software Option QPHY-DDR2-OM-E Rev A 7 INTRODUCTION TO QPHY-DDR2 QPHY-DDR2 is an automated test package performing all of the real time o

Page 46 - 46 QPHY-DDR2-OM-E Rev A

8 QPHY-DDR2-OM-E Rev A Burst Read The Burst Read command is initiated by having CS# and CAS# LOW while holding RAS# and WE# HIGH at the rising edg

Page 47

QPHY-DDR2 Software Option QPHY-DDR2-OM-E Rev A 9 Burst Write The Burst Write command is initiated by having CS#, CAS# and WE# LOW while holding RAS

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