Teledyne-lecroy QPHY-DDR2 Manuel d'utilisateur télécharger pdf (Page 29)

QPHY-DDR2 Software Option

QPHY-DDR2-OM-E Rev A 29

 tDS1(base)

 tDH1(base)

 SlewR (on Add/Ctrl signal)

 SlewF (on Add/Ctrl signal)

 VIH(ac) (on Add/Ctrl signal)

 VIH(dc) (on Add/Ctrl signal)

 VIL(ac) (on Add/Ctrl signal)

 VIL(dc) (on Add/Ctrl signal)

 VSWING (on Add/Ctrl signal)

 AC Overshoot Peak Amplitude (on Add/Ctrl signal)

 AC Overshoot Area above VDDQ (on Add/Ctrl signal)

 AC Undershoot Peak Amplitude (on Add/Ctrl signal)

 AC Undershoot Area below VSSQ (on Add/Ctrl signal)

 tIS(base) (on Add/Ctrl signal)

 tIH(base) (on Add/Ctrl signal)

D1) Demo of All Clock tests

This configuration uses the saved waveforms found in the D:\Waveforms\DDR2 folder and runs all of the clock

tests. All of the variables are set to their defaults except Use Stored Waveforms is set to Yes and Use Stored

Trace for Speed Grade is set to Yes. The limit set in use is DDR2-667. The tests run are:

 tCK(avg)

 tCK(abs)

 tCH(avg)

 tCL(avg)

 tCH(abs)

 tCL(abs)

 tJIT(duty)

 tJIT(per)

 tJIT(CC)

 tERR(n per)

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Teledyne-lecroy QPHY-DDR2 Manuel d'utilisateur Page 29