Teledyne-lecroy QPHY-PCIe Manuel d'utilisateur télécharger pdf (Page 6)

Test Fixtures

The PCI Express standard describes a set of two fixtures used for connection to the signal

under test: the compliance load board (CLB) used to test system boards and the compliance

base board (CBB) used to test add-in cards. Both the CLB and CBB are available through the

PCI special interest group (PCI-SIG) at www.pcisig.org. Fixtures that are compliant with

Revision 1.1 of the Base and CEM Specifications are required to execute QPHY-PCIe tests for

Gen 1 add-in cards and system boards; likewise, fixtures compliant with Revision 2.0 of the

specifications are required to execute tests for Gen 2 devices.

Using SMA type cables with the Gen 1 fixtures, or SMA-to-SMP type cables with the Gen 2

fixtures, allows positive and negative line attachment of the differential signals directly to

separate channels on the instrument. The fixtures are designed to apply the compliance test

load to the ports of the device under test. The CBB provides a 100 MHz system clock used by

add-in cards plugged into the fixture and a socket for a standard ATX power supply.

The 50 Ω impedance on each oscilloscope channel provides the proper loading for compliance

testing. All PCI Express add-in cards and system boards must transmit a standard compliance

pattern when loaded with 50 Ω to ground on each line – all while no signal is being received.

The compliance load board (CLB1) provides probing access for 1, 4, 8 and 16 lane connectors

that connect to Gen 1.1 system boards. This is used for testing system boards that only perform

at 2.5GT/s.

Figure 1. Compliance Load Board for 1, 4, 8 and 16 lane connectors (CLB1).

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Teledyne-lecroy QPHY-PCIe Manuel d'utilisateur Page 6